Published:

2022-08-08

Issue:

Vol. 16 No. 2 (2022)

Section:

A Research Vision

Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem

Diseño e Implementación en Forma Paralela en la FPGA Artix-7 del Criptosistema SIMON32/64

Authors

  • José Gabriel Rincón-González Universidad de los Llanos
  • Andrés Hernández-Baquero Universidad de los Llanos
  • Fabián Velásquez-Clavijo Universidad de los Llanos

Keywords:

Artix-7, Cryptosystem, Digital transformation, FPGA, Private key, SIMON (en).

Keywords:

Artix-7, Criptosistema, Transformación digital, FPGA, Clave privada, SIMON (es).

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Abstract (en)

In the rise of digital transformation, information security is positioned in a prominent place because it provides confidence to society in the use of information technologies. For this reason, there is growing research in this area. One way to achieve this security is through private key cryptosystems such as SIMON. This work presents a parallel implementation in the Artix-7 FPGA of the SIMON32/64 cryptosystem to obtain an average delay time of 37.8 ns for the cipher and 54.1 ns for the decypher that allows real-time encryption applications.

Abstract (es)

En el auge de la transformación digital, la seguridad de la información se posiciona en un lugar destacado porque brinda confianza a la sociedad en el uso de las tecnologías de la información. Por esta razón existe una creciente investigación en esta área. Una forma de conseguir esta seguridad es a través de criptosistemas de clave privada como SIMON. En este artículo se presenta una implementación en forma paralela en la FPGA Artix-7 del criptosistema SIMON32/64 para obtener un tiempo de retardo promedio de 37.8 ns para el cifrador y 54.1 ns para el descifrador que permiten las aplicaciones de cifrado en tiempo real.

References

M. Willett, "Lessons of the SolarWinds Hack", Survival (Lond)., vol. 63, no. 2, 2021. https://doi.org/10.1080/00396338.2021.1906001

H. S. Lallie et al, "Cyber security in the age of COVID-19: A timeline and analysis of cyber-crime and cyber-attacks during the pandemic”, Comput. Secur. vol. 105, 2021. https://doi.org/10.1016/j.cose.2021.102248

J. Aguirre, “Curso de seguridad informática y criptografía”, vol. 3.1. 2003.

E. Biham, A. Shamir, "Differential cryptanalysis of DES-like cryptosystems”, J. Cryptol., vol. 4, no. 1, 1991. https://doi.org/10.1007/BF00630563

J. Daemen, V. Rijmen, "AES proposal: Rijndael”, no. december, 1999.

N. Velasquez, N. Pineda, "Design and Implementation of an AES-Rijndael Cryptoprocessor Prototype on FPGA”, Universidad de Los Llanos, 2007.

A. Bogdanov, L. R. Knudsen, G. Leander, C. Paar, A. Poschmann, "PRESENT: An Ultra-Lightweight Block Cipher"

J. Guo, T. Peyrin, A. Poschmann, and M. Robshaw, "The LED block cipher”, in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2011. https://doi.org/10.1007/978-3-642-23951-9_22

F. Velásquez J. F. Castaño, "Cryptographic Implementations for Fpga”, Rev. Visión Electron, vol. 5, no. 1, pp. 26-37, 2011.

R. A. González Bustamante, R. Ferro Escobar, H. Vacca González, “Smart cities in collaboration with the internet of things, Vis. Electron., vol. 14, no. 2, pp. 185–195, 2020. https://doi.org/10.14483/22484728.16995

P. D. Bonilla Nieto, J. S. Carrillo Sanabria, J. R. Camargo López, “Solar energy manager with PSOC5LP”, Vis. Electron., vol. 13, no. 1, pp. 112–122, 2019. https://doi.org/10.14483/22484728.14426

C. A. González González, F. Arévalo Tapias, J. Hernández Gutiérrez, “Análisis de seguridad en redes LPWAN para dispositivos IoT”, Rev. Vínculos, vol. 16, no. 2, pp. 252–261, 2019. https://doi.org/10.14483/2322939X.15712

L. W. Ray Beaulieu, D. Shors, J. Smith, S. Treatman-Clark, B. Weeks, "the Simon and Speck families of lightweight block ciphers”, Natl. Secur. Agency, p. 42, 2013.

P. Maene, I. Verbauwhede, "Single-cycle implementations of block ciphers”, Lect. Notes Comput. Sci. (including Subser. Lect. Notes Artif. Intell. Lect. Notes Bioinformatics), vol. 9542, pp. 131-147, 2016. https://doi.org/10.1007/978-3-319-29078-2_8

S. Abed, R. Jaffal, B. J. Mohd, M. Alshayeji, "FPGA modeling and optimization of a SIMON lightweight block cipher”, Sensors (Switzerland), vol. 19, no. 4, 2019. https://doi.org/10.3390/s19040913

A. Shahverdi, M. Taha, T. Eisenbarth, "Lightweight Side Channel Resistance: Threshold Implementations of Simon”, IEEE Trans. Comput. vol. 66, no. 4, pp. 661-671, 2017. https://doi.org/10.1109/TC.2016.2614504

S. B. Basturk, C. E. Dancer, and T. McNally, "High-throughput Configurable SIMON Architecture for Flexible Security”, Pharmacol. Res. p. 104743, 2020. https://doi.org/10.1016/j.mejo.2021.105085

A. Muthumari et al., "High security for de-duplicated big data using optimal SIMON Cipher”, Comput. Mater. Contin. vol. 67, no. 2, pp. 1863-1879, 2021. https://doi.org/10.32604/cmc.2021.013614

W. Diehl, A. Abdulgadir, J. P. Kaps, K. Gaj, "Comparing the cost of protecting selected lightweight block ciphers against differential power analysis in low-cost FPGAs”, Computers, vol. 7, no. 2, pp. 128-135, 2018. https://doi.org/10.3390/computers7020028

How to Cite

APA

Rincón-González, J. G., Hernández-Baquero, A., and Velásquez-Clavijo, F. (2022). Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem. Visión electrónica, 16(2). https://revistas.udistrital.edu.co/index.php/visele/article/view/20391

ACM

[1]
Rincón-González, J.G. et al. 2022. Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem. Visión electrónica. 16, 2 (Aug. 2022).

ACS

(1)
Rincón-González, J. G.; Hernández-Baquero, A.; Velásquez-Clavijo, F. Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem. Vis. Electron. 2022, 16.

ABNT

RINCÓN-GONZÁLEZ, José Gabriel; HERNÁNDEZ-BAQUERO, Andrés; VELÁSQUEZ-CLAVIJO, Fabián. Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem. Visión electrónica, [S. l.], v. 16, n. 2, 2022. Disponível em: https://revistas.udistrital.edu.co/index.php/visele/article/view/20391. Acesso em: 17 jul. 2024.

Chicago

Rincón-González, José Gabriel, Andrés Hernández-Baquero, and Fabián Velásquez-Clavijo. 2022. “Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem”. Visión electrónica 16 (2). https://revistas.udistrital.edu.co/index.php/visele/article/view/20391.

Harvard

Rincón-González, J. G., Hernández-Baquero, A. and Velásquez-Clavijo, F. (2022) “Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem”, Visión electrónica, 16(2). Available at: https://revistas.udistrital.edu.co/index.php/visele/article/view/20391 (Accessed: 17 July 2024).

IEEE

[1]
J. G. Rincón-González, A. Hernández-Baquero, and F. Velásquez-Clavijo, “Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem”, Vis. Electron., vol. 16, no. 2, Aug. 2022.

MLA

Rincón-González, José Gabriel, et al. “Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem”. Visión electrónica, vol. 16, no. 2, Aug. 2022, https://revistas.udistrital.edu.co/index.php/visele/article/view/20391.

Turabian

Rincón-González, José Gabriel, Andrés Hernández-Baquero, and Fabián Velásquez-Clavijo. “Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem”. Visión electrónica 16, no. 2 (August 8, 2022). Accessed July 17, 2024. https://revistas.udistrital.edu.co/index.php/visele/article/view/20391.

Vancouver

1.
Rincón-González JG, Hernández-Baquero A, Velásquez-Clavijo F. Design and parallel implementation on Artix-7 FPGA of the SIMON32/64 Cryptosystem. Vis. Electron. [Internet]. 2022 Aug. 8 [cited 2024 Jul. 17];16(2). Available from: https://revistas.udistrital.edu.co/index.php/visele/article/view/20391

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